1. Field of the Invention
The present disclosure relates generally to a semiconductor chip package and, more particularly, to a multi-chip package formed by mounting a plurality of semiconductor chips in one package including a heat transfer blocking mechanism.
A claim of priority is made to Korean Patent Application No. 10-2006-0085302, filed on Sep. 5, 2006, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
2. Description of the Related Art
Traditionally, semiconductor chips were mounted such that only one chip was mounted in a semiconductor package. However, with advances in the electronics industry which have seen the development of increasingly thin, flat, and light-weight electronic products, multi chip package (“MCP”) technology has been developed. Specifically, by using MCP technology, multiple chips may be mounted in a single semiconductor package. By mounting multiple chips in one package, MCP technology allows a manufacturer to reduce the size, weight, and mount area of a semiconductor package. Indeed, as sizes of many electronic devices are being continuously reduced, there has been an increase in the use of MCP to build semiconductor devices such as flash memory, volatile memory, microchips, etc.
In MCP technology, different types of chips may be mounted in the same package. Therefore, chips mounted in the same package may have different attributes. For example, one chip in the package may be rated to consume more power than the other(s). Furthermore, even if two semiconductor chips perform the same function, they may be rated to consume different amounts of power. For example, the power consumed by a volatile memory chip may be different than that consumed by a non-volatile memory chip.
As such, when different kinds of memory chips having different power consumption ratings are mounted in the same semiconductor package, there may be a few problems. For example, the junction temperature Tj of a semiconductor chip having a relatively low power rating may increase when such a chip is placed adjacent to another semiconductor chip having a relatively higher power rating. This is because heat generated from the chip having the higher power rating may be transferred to the chip having the lower power rating. Now, if the Tj of a chip exceeds the chip's maximum junction allowance temperature Tjmax, the chip's attributes such as, for example, refresh characteristics, operating speed, and operating life, may be compromised.
There is therefore a need for semiconductor packages which include mechanisms to prevent the transfer of heat from one chip to another housed in the same package. The present disclosure is directed towards one or more such semiconductor packages.